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FPGA Tomu Workshop

Hi, I’m Fomu! This workshop covers the basics of Fomu in a top-down approach. We’ll start out by learning what Fomu is, how to load software into Fomu, and finally how to write software for Fomu.

FPGAs are complex, weird things, so we’ll take a gentle approach and start out by treating it like a Python interpreter first, and gradually peel away layers until we’re writing our own hardware registers. You can take a break at any time and explore! Stop when you feel the concepts are too unfamiliar, or plough on and dig deep into the world of hardware.

Table of Contents

• Requirements
  • Required Files
  • Required Software
  • Required Hardware
  • Which Fomu do I have?
  • Required Drivers
    • Setup udev rules
    • Steps to set up udev rule
    • Installing Zadig Drivers
• Background
  • About FPGAs
    • Turning code into gates
  • About the ICE40UP5K
  • About Fomu
• Python on Fomu
  • Fomu Python Extensions
  • Memory-mapped Registers
    • Memory-mapped RGB driver
• Fomu as a CPU
  • Interacting with the LED Directly
  • Compiling RISC-V Code
  • Debugging RISC-V Code
  • Using Rust
  • Further RISC-V experiments
• Hardware Description Languages
  • Verilog on Fomu
    • “Hello world!” - Blink a LED
    • Reading Input
  • Migen and LiteX
    • “Hello world!” - Blink a LED
    • Wishbone Bus Basics
    • Wishbone Bus Extension
• Working with LiteX and (co-)simulation with Renode
  • Getting Renode
    • Try out Renode quickly with precompiled LiteX demos
  • Running your own Zephyr binary on LiteX/VexRiscv in Renode
    • Building a Zephyr application
    • Run the app in Renode
    • Debugging the app in Renode
  • Wishbone bridge between Renode and Fomu
    • Setting up the server
    • Connecting from Renode
  • Renode Co-simulation using Verilator
    • Integration with verilated code
• Bootloader
  • Updating the Fomu Bootloader
• Getting Help
  • IRC Chat Channel
  • Mailing Lists

Table Of Contents

• FPGA Tomu Workshop
  • Table of Contents